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MAX107
fiers (I&Q) reduce this effect significantly, allowing pre-
cise digitizing of fast analog data at high conversion
rates. The input amplifiers buffer the input signal and
allow a full-scale signal input range of ±400mV
(800mVp-p).
Internal Reference
The MAX107 features an integrated, buffered +2.5V
precision bandgap reference. This reference is internal-
ly scaled to match the analog input range specification
of ±400mV. The data converter’s reference output
(REF) can source up to 500A. REF should be buffered,
if used to supply external devices.
LVDS Digital Outputs
The MAX107 provides data in two’s complement format
to differential LVDS outputs. A simplified circuit
schematic of the LVDS output cells is shown in Figure
2. All LVDS outputs are powered from separate I-chan-
nel OVCCI and Q-channel OVCCQ (Q-channel) power
supplies, which may be operated at +3.3V ±10%. The
MAX107 LVDS-outputs provide a typical ±270mV volt-
age swing around a common mode voltage of roughly
Dual, 6-Bit, 400Msps ADC with On-Chip,
Wideband Input Amplifier
12
______________________________________________________________________________________
Figure 1. MAX105 Flash Converter Architecture
INI-
INI+
2k
CLK+
AVCC
CLK-
P0I+/P0I-
DREADY+/DREADY-
DOR+/DOR-
P5I+/P5I-
A0I+/A0I-
A5I+/A5I-
P0Q+/P0Q-
P5Q+/P5Q-
A0Q+/A0Q-
A5Q+/A5Q-
10k
10k
CM BUFFER
REFERENCE
PRIMARY
DATA PORT
P0I-P5I
AUXILIARY
DATA PORT
A0I-A5I
PRIMARY
DATA PORT
P0Q-P5Q
AUXILIARY
DATA PORT
A0Q-A5Q
I ADC
1:2
REF
MAX107
INQ-
INQ+
2k
PRE-AMP
Q ADC
REF
DOR
PRE-AMP
MAX107
P0I+ - P5I+
A0I+ - A5I+
P0I- - P5I-
A0I- - A5I-
OVCCI
55
55
Figure 2. Simplified LVDS Output Model
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